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FEATURES
- All designs are synchronous to a single system clock
- All critical inputs feature digital filtering for noise immunity
- All designs are parametric and may be customized by user
- All designs made in VHDL and are portable across device families and vendors
| SNO |
DESCRIPTION |
| STG1 |
D FLIP-FLOP ARRAY |
| STG2 |
JK FLIP-FLOP ARRAY |
| STG3 |
D LATCH ARRAY |
| STG4 |
D FLIP-FLOP |
| STG5 |
JK FLIP-FLOP |
| STG6 |
D LATCH |
| STG7 |
T FLIP-FLOP |
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