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FEATURES
- All designs are synchronous to a single system clock
- All critical inputs feature digital filtering for noise immunity
- All designs are parametric and may be customized by user
- All designs made in VHDL and are portable across device families and vendors
| SNO |
DESCRIPTION |
| IP3 |
Direct memory accesss(DMA)(8237) |
| IP4 |
Serial Port(UART) |
| IP6 |
DRAM controller |
| IP9 |
Fixed point CPU |
| IP10 |
Floating Point CPU |
| IP13.1 |
IIR filters |
| IP18 |
Uni-Directional Shaft Encoder Interface Logic |
| IP19 |
Bi-Directional Shaft Encoder Interface Logic |
| IP21 |
LCD VGA display Controller(320 x 240) pixels resolution |
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