System Automation Group

Associated with CDAC-ATC, Mumbai.

Training >> Training Courses >> VHDL >> A7

Training

• Training Courses

• VHDL

• ORCAD

• AUTOCAD

• PIC Microcontroller

• Assembly Language

• Linux & VC

• Others

• Process Logic Controller

• Training Facilities

The above VLSI components
will be designed in VHDL, each will be designed and simulated on the MAXPLUS+2
software from ALTERA inc. Each of these will be implemented on the VLSI design kit and on robots for serial communication.

COURSE A7: PRIORITY INTERRUPT CONTROLLER

USES

Used in microprocessor systems for DRAM refresh and reliable interfacing with serial/parallel ports, keyboard, mouse, hard disk, RTCC chip, etc.

PREREQUISITES

        Course-A1. Introduction to VHDL and VLSI design (I)

CONTENTS

        1. Understanding relavent CPU and interrupt controller timing diagrams .
        2. Understanding how the instruction set of a CPU is designed to handle interrupts.
        3. Interrupt service routines.
        4. Decoding the INTA (interrupt acknowledge) signals from CPU.
        5. Designing the interrupt request register (IRR) for level/edge triggered interrupts.
        6. Designing the interrupt service register (ISR).
        7. Designing the priority resolver.
        8. Generation of interrupt vector.
        9. Interfacing the interrupt vector to the CPU data bus.