The USB port is the most popular communication interface between computers and peripherals It embodies hot plug and play protocol with unmatched speed, performance and bandwidth.

PREREQUISITES

       Course - A1 or A1.1: Introduction to VHDL / Verilog
       Course-A31.USB architecture

CONTENTS

1. BIT stuffer and unstuffer
   
2. NRZI encoder and decoder
   
3. Receive State Machine
   
4. Transmit State Machine
   
5. Elasticity buffer.
   
6. Rx and Tx shift registers
   
7. Rx and Tx Hold registers
   
8. The above VLSI components will be designed in VHDL, each will be designed and simulated on the QUARTUS software from ALTERA inc and implemented on the VLSI design kit.